1. Field of the Invention
The present disclosure is related to a shift register, and more particularly to a shift register capable of suppressing a leakage current thereof.
2. Description of the Prior Art
In general, a display panel has a plurality of pixels, a gate driver and a source driver. The source driver is configured to write data signals into turned-on pixels. The gate driver has a plurality of shift register stages which are employed to generate plural gate signals for controlling operations of turning on/off the pixels. However, the number of transistors of the shift register according to the prior art is excessive, such that it is difficult to achieve a narrow peripheral region design of the display panel, where the peripheral region is located around a matrix of the pixels of the display panel.